This work was sponsored by the Defense Advanced Research Projects Agency
(DoD), monitored by the Naval Electronics Systems
Command under contract No. N00039-84-C-0089, and by the CSELT
Corporation of Italy.
The views and conclusions contained in this document are those of the
authors and should not be interpreted as representing official policies,
either expressed or implied, of the Defense Research Projects Agency,
of the US Government, or of CSELT.
[1] A clock is considered to be faulty when its value is more than a small specified interval apart from the majority of the clocks of the other machines [1,2].